What you get is a simple payload you can boot via skiboot, or another OPAL-compatible firmware. Features, in no particular order:
- 64-bit real-mode HV LE operation.
- logging via sim inteface (mambo_write).
- logging via OPAL firmware (opal_write).
- calling C code, stack/BSS/linkage setup/TOC.
- calling BE code from LE.
- FDT parsing, dumping FDT.
- Taking and returning from exceptions, handling unrecoverable/nested exceptions.
- Timebase (i.e. the "timestamp counter"), decrementer and hypervisor decrementer manipulation with some basic timer support (done for periodic callbacks into OPAL).
- Running at HV alias addresses (loaded at 0x00000000200XXXXX, linked at 0x80000000200XXXXX). The idea being that the code will access physical RAM and its own data structures solely using the HV addresses.
- SLB setup: demonstrates 1T segments with 4K base page and 16M base page size. One segment (slot = 0) is used to back the HV alias addresses with 16M pages. Another segment maps EA to VA 1:1 using 4K pages.
- Very basic HTAB setup. Mapping and unmapping for pages in the 4K and 16M segments, supporting MPSS (16M pages in the 4K segment). No secondary PTEG. No eviction support. Not SMP safe. Any access within the HV alias addresses get mapped in. Any faults to other unmapped locations are crashes, as addresses below 0x8000000000000000 should only be explicit maps.
- Taking exception vectors with MMU on at the alternate vector location (AIL) 0xc000000000004000.
- Running unpriviledged code.
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